This is certainly positive news. We need more competition in the processor field. Having essentially a choice between Intel and AMD got us malware like the Intel Management Engine and its AMD equivalent. With a monopoly comes enshitification.
Not that I disagree with you but what’s stopping any ARM or RISC-V CPU manufacturer from putting their own version of IME in their chips?
ARM TrustZone is already common on A-series. Device manufacturers want secure storage & computation, so chipmakers provide it.
There’s ARM, with Snapdragon, Mediathek, Broadcom, Nvidia, Apple and Ampere. Contrary to RISC-V it’s already used in many computers.
All of which also have plenty of proprietary components and aren’t created with FOSS in mind.
I hope that as RISC-V progresses, companies will pick it up and develop on top of it, giving users full access to their hardware alongside FOSS software
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Sure, but they’re all using ARM IP; RISCV isn’t just one entrant into the processor IP market like ARM is, it allows any company to become an entrant with its own IP.
Sure it’s not currently the ISA for man main processors, but it is already used by companies like NVIDIA and WD in their products.
Duopolys might be worse. The illusion of choice and opponent security.
What is the amd equivalent?
Bruh
Why is RISC-V significant? I’m completely out of the loop and have only heard of it in passing.
Open standard CPU instruction set. Meaning people can design new chips for it without needing to enter an expensive license agreement.
I would have thought the license agreement would be one of the least expensive parts of making modern high-performance chips.
Quite the opposite. Well, sort of.
It’s easy to get a licence, you just need money. Lots of money.
That’s if you can get a licence. Intel only licensed to AMD because the USA military requires two vendors.
ARM charges an, err, arm and a leg.
Intel licensed to Cyrix (now VIA) as well, and it wasn’t the military but IBM that wanted more suppliers
Oh yeah, I even had a VIA! What happen to them?
That was all from unreliable memory. TY for the error correction.
Tbh the biggest saving from this that I’ve actually heard was time saving some 6 months or even potentially saving legal costs during development. Which for a budget starting closer to nothing,like academics, open source, or early start ups, any cost is barrier.
It’s actually very lucrative scheme. For example, you’ll need to get some licenses to some Qualcomm patents before you can even buy their Snapdragon chips.
If you have the order volume, enough capital to book fab capacity and a solid margin, kind of. These agreements are often done in cents per chip with minimum volume amounts, this is why you see most complicated ARM SoCs targeted at the smartphone market first and trickle down into lower margin products later.
This is the consequences of only being able to get your licence from one vendor.
Because it’s an open Instruction Set Architecture.
Many different companies used to design their own CPU IS architectures in the past like (MIPS, AVR, PIC, …) and of course the most popular ARM. Downside of this is that the software and ecosystems between these architectures are not compatible. Effort wasted in porting a library to one architecture cannot be always reused for another.
Recently we see a lot of companies adopting RiscV, and there is a big collaboration between them to ratify the specification and provide software support. This will in turn accelerate the development, and software and hardware support will hopefully overtake ARM in the future.
And Apple will get to do a fourth architecture migration
*fifth
I’m not really counting the 6502, since I don’t think Apple ever bothered with emulation or backwards compatibility for it once they moved to 68000.
I thought their old PowerPc architecture was risc
Indeed it was. Different RISC ISA though.
This is for my own clarification, and anyone else that is confused by the terminology here.
In the mid- or late 1990s, I took a processor design class, and RISC was “Reduced Instruction Set Computer”, a generic term for the direction processors were going at the time - even though they had a reduced set of instructions, and therefore had to process more instructions, they could run faster overall because the simplification meant they processed each individual instruction that much more quickly. (IIRC the class textbook was written by the people who had designed the MIPS processor.)
It was my understanding that the speed limitations in the traditional “complex” (CISC) processors were then overcome, so that processor design philosophy continues as well (in particular, x86 architecture is still CISC).
Now, I’m looking this up on Wikipedia: Okay, RISC-V is a set of instructions for a processor, and there are multiple open-source processors that implement RISC-V.
This announcement is that Debian now will theoretically run on those processors. Cool!
Its completely open source
Oh :/
It’s still a good thing. It’s an open specification, so anyone creating a design that is compliant can use software targeted at RISC-V. Just like you can buy USB-C flash drive from any manufacturer and use it with any OS that supports USB mass storage!
Because we’re getting risc one way or another and the two targets are risc-v and arm. All the phones, tablets, mini pcs and apple made the jump to either arm or risc-v.
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That’s amazing! Any PCBs with RiscV chips available? I’d love to compile and run a node in my k8s cluster with it to test how it would run. I’d love a more efficient node!
Here you go: RISC-V Exchange: Available Boards
EDIT: Good luck finding any boards in stock. Sorry.That’s awesome, thanks for pointing me there
Another option: Pine64’s board
Anyone know what kind of board used by Debian maintainers for testing Debian on RISC-V?
The porterbox is a HiFie Unmatched.
This one? https://www.sifive.com/boards/hifive-unmatched
Very interesting, looks like you can buy it for $700 on AliExpress. I wonder if there are other debian compatible RISC -V boards with cheaper prices. $700 is not exactly hobbyist friendly.
You may run into a few hurdles until ACPI support for RISC-V devices matures a bit, but hopefully it’ll be better than the situation with ARM boards.
Is the main advantage of RISC-V’s that it is a free and open standard, or does it have other inherent advantages over other RISC architectures as well?
The advantages that we’ll see come from the implementation more than the spec, but having an open standard for the ISA allows more companies to make implementations and to innovate.
The true benefits will be ~10 years in, when RISCV chip designers are more experienced and have had time to innovate and build good IP blocks.
E.g. companies that make ARM SoCs are pick’n mix’ing IP from ARM, and adding their own special sauce on top. The future in RISCV comes from having many companies that compete to make intercompatible IP, which hardware vendors like Qualcomm and Rockchip can then licence to make SoCs out of.
There is benefit to RISCV, over ARM but mostly that comes down to:
- not having legacy compatibility to maintain.
- having a frozen spec that is less likely to slowly get feature creep like x86 & ARM.
- having hindsight for things like vector extension implementations & macro-op fusion.
It’s predominantly the first one. They have made a few unique design decisions, but is a fairly conservative “boring” RISC design. The only thing remarkable I can think of of the core ISA is the fact that they have no conditional status registers (no NZVC bits), so you have to kind of combine conditions and branches together, but that’s not exactly unprecedented (MIPS did something similar).
In the ISA extensions, there is still some instability and disagreement about the best ISA design for some parts. Just the fact that RISC-V is going to have both SIMD and Vector instructions is a bit unique, but probably won’t make a huge difference.
But it’s a fairly boring RISC design which is free and open and without any licensing hoops to jump through, which is the most interesting bit.
HELL YEAH BROTHER LETS GOOO
This is great!
Cool, I really want something like RPi, but with SATA on RISC-V. Maybe somebody will make “laptop” cases with normal deep travel keyboards for these too. It’s a possibility, at least.
The problem isn’t really the software, but rather GPU drivers/MESA. There are ubuntu ports for many boards, but without GPU acceleration.
Personally I’d rather run one of these chips headless anyways.
I purchased a LicheePi 4A from Sipeed and it’s really a good news for me.
